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Interrupts in the RP2350

In the previous chapter, we looked at what interrupts are and the role of the NVIC. Now, lets look at which interrupts are actually available on the RP2350.

Interrupts fall into two groups: system exceptions and external interrupts.

System exceptions are defined by the CPU architecture itself. These include reset, fault handlers, and the system timer. They behave the same way across most Cortex-M chips.

External interrupts come from peripherals on the RP2350. Each peripheral that can generate an interrupt has an IRQ number and a vector name. These are the names you will see in code.

The table below shows the external interrupts on the RP2350, numbered from 0 to 51. They cover common peripherals such as timers, GPIO, DMA, and communication interfaces like I2C, SPI, and UART.

You do not need to memorize this table. Its purpose is to help you recognize where names like I2C0_IRQ or UART0_IRQ come from when you see them in examples or documentation.

The full details are in the RP2350 datasheet, section 3.2 on page 82.

In the next chapter, we will see how Embassy uses these interrupts without requiring you to write interrupt handlers manually.

RP2350 External Interrupts

Important

Some interrupt descriptions are simplified here for a beginner-friendly overview. For more accurate and detailed information, refer to the RP2350 datasheet.

Timers

Timer alarms used for delays and scheduling.

IRQVectorDescription
0TIMER0_IRQ_0Timer 0 alarm interrupt
1TIMER0_IRQ_1Timer 0 alarm interrupt
2TIMER0_IRQ_2Timer 0 alarm interrupt
3TIMER0_IRQ_3Timer 0 alarm interrupt
4TIMER1_IRQ_0Timer 1 alarm interrupt
5TIMER1_IRQ_1Timer 1 alarm interrupt
6TIMER1_IRQ_2Timer 1 alarm interrupt
7TIMER1_IRQ_3Timer 1 alarm interrupt

PWM

PWM counter wrap events.

IRQVectorDescription
8PWM_IRQ_WRAP_0PWM wrap interrupt
9PWM_IRQ_WRAP_1PWM wrap interrupt

DMA

DMA transfer events.

IRQVectorDescription
10DMA_IRQ_0DMA transfer interrupt
11DMA_IRQ_1DMA transfer interrupt
12DMA_IRQ_2DMA transfer interrupt
13DMA_IRQ_3DMA transfer interrupt

USB

USB controller events.

IRQVectorDescription
14USBCTRL_IRQUSB controller interrupt

PIO

PIO state machine events.

IRQVectorDescription
15PIO0_IRQ_0PIO 0 interrupt
16PIO0_IRQ_1PIO 0 interrupt
17PIO1_IRQ_0PIO 1 interrupt
18PIO1_IRQ_1PIO 1 interrupt
19PIO2_IRQ_0PIO 2 interrupt
20PIO2_IRQ_1PIO 2 interrupt

GPIO and Core I/O

GPIO and core signaling events.

IRQVectorDescription
21IO_IRQ_BANK0GPIO interrupt
22IO_IRQ_BANK0_NSGPIO interrupt
23IO_IRQ_QSPIQSPI GPIO interrupt
24IO_IRQ_QSPI_NSQSPI GPIO interrupt
25SIO_IRQ_FIFOInter-core FIFO interrupt
26SIO_IRQ_BELLInter-core doorbell interrupt
27SIO_IRQ_FIFO_NSInter-core FIFO interrupt
28SIO_IRQ_BELL_NSInter-core doorbell interrupt
29SIO_IRQ_MTIMECMPSystem timer interrupt

Communication Peripherals

Communication interface events.

IRQVectorDescription
30CLOCKS_IRQClock system interrupt
31SPI0_IRQSPI interrupt
32SPI1_IRQSPI interrupt
33UART0_IRQUART interrupt
34UART1_IRQUART interrupt
35ADC_IRQ_FIFOADC FIFO interrupt
36I2C0_IRQI2C interrupt
37I2C1_IRQI2C interrupt

System and Power

System and power management events.

IRQVectorDescription
38OTP_IRQOTP interrupt
39TRNG_IRQRandom number generator interrupt
40ReservedReserved
41ReservedReserved
42PLL_SYS_IRQSystem PLL interrupt
43PLL_USB_IRQUSB PLL interrupt
44POWMAN_IRQ_POWPower manager interrupt
45POWMAN_IRQ_TIMERPower manager timer interrupt

Software IRQs

Interrupts that can be triggered by software.

IRQVectorDescription
46SPAREIRQ_IRQ_0Software interrupt
47SPAREIRQ_IRQ_1Software interrupt
48SPAREIRQ_IRQ_2Software interrupt
49SPAREIRQ_IRQ_3Software interrupt
50SPAREIRQ_IRQ_4Software interrupt
51SPAREIRQ_IRQ_5Software interrupt